diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-12-29 05:12:56 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-01-20 09:22:59 +0000 |
| commit | c196246f75ae8fd235055250593fc7a78f5f3888 (patch) | |
| tree | bbb1cfa12daf81da3798d27649123ae80369a142 /src/soc/intel/broadwell | |
| parent | e1383d39d794278b6e88b1658c620ad016bef05d (diff) | |
ACPI GNVS: Drop most dev_count_cpu()
Only amd/picasso and amd/stoneyridge have reference to
PCNT and that could be replaced with acpigen.
Remove the PCNT name from GNVS OperationRegion elsewhere.
Change-Id: I7dd45a840b3585fd24c31fd923b991c34ab4d783
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49272
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/broadwell')
| -rw-r--r-- | src/soc/intel/broadwell/include/soc/nvs.h | 2 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/pch/acpi/globalnvs.asl | 2 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/pch/lpc.c | 3 |
3 files changed, 2 insertions, 5 deletions
diff --git a/src/soc/intel/broadwell/include/soc/nvs.h b/src/soc/intel/broadwell/include/soc/nvs.h index e0e805253a..1b6a231651 100644 --- a/src/soc/intel/broadwell/include/soc/nvs.h +++ b/src/soc/intel/broadwell/include/soc/nvs.h @@ -18,7 +18,7 @@ struct __packed global_nvs { u8 lckf; /* 0x08 - Global Lock function for EC */ u8 prm4; /* 0x09 - Lock function parameter */ u8 prm5; /* 0x0a - Lock function parameter */ - u8 pcnt; /* 0x0b - Processor Count */ + u8 unused_was_pcnt; /* 0x0b - Processor Count */ u8 ppcm; /* 0x0c - Max PPC State */ u8 tmps; /* 0x0d - Temperature Sensor ID */ u8 tlvl; /* 0x0e - Throttle Level Limit */ diff --git a/src/soc/intel/broadwell/pch/acpi/globalnvs.asl b/src/soc/intel/broadwell/pch/acpi/globalnvs.asl index 7ee7e1396e..b83b957c6c 100644 --- a/src/soc/intel/broadwell/pch/acpi/globalnvs.asl +++ b/src/soc/intel/broadwell/pch/acpi/globalnvs.asl @@ -26,7 +26,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) LCKF, 8, // 0x08 - Global Lock function for EC PRM4, 8, // 0x09 - Lock function parameter PRM5, 8, // 0x0a - Lock function parameter - PCNT, 8, // 0x0b - Processor Count + , 8, // 0x0b - Processor Count PPCM, 8, // 0x0c - Max PPC State TMPS, 8, // 0x0d - Temperature Sensor ID TLVL, 8, // 0x0e - Throttle Level Limit diff --git a/src/soc/intel/broadwell/pch/lpc.c b/src/soc/intel/broadwell/pch/lpc.c index 69f2741465..cf6e7d7177 100644 --- a/src/soc/intel/broadwell/pch/lpc.c +++ b/src/soc/intel/broadwell/pch/lpc.c @@ -604,9 +604,6 @@ void soc_fill_gnvs(struct global_nvs *gnvs) { /* Set unknown wake source */ gnvs->pm1i = -1; - - /* CPU core count */ - gnvs->pcnt = dev_count_cpu(); } static unsigned long broadwell_write_acpi_tables(const struct device *device, |