acpi: Generate valid ACPI processor objects

The existing code generated invalid ACPI processor objects
if the core number was greater than 9.  The first invalid
object instance was autocorrected by Linux, but subsequent
instances conflicted with each other, leading to a failure
to boot if more than 10 CPU cores were installed.

The modified code will function with up to 99 cores.

Change-Id: I62dc0eb61ae2e2b7f7dcf30e9c7de09cd901a81c
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/8422
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>

2 files changed, 50 insertions, 50 deletions

diff --git a/src/soc/intel/broadwell/acpi/cpu.asl b/src/soc/intel/broadwell/acpi/cpu.asl
index f0da2dedd6..2921ceae5e 100644
--- a/src/soc/intel/broadwell/acpi/cpu.asl
+++ b/src/soc/intel/broadwell/acpi/cpu.asl
@@ -18,31 +18,31 @@
  */
 
 /* These devices are created at runtime */
-External (\_PR.CPU0, DeviceObj)
-External (\_PR.CPU1, DeviceObj)
-External (\_PR.CPU2, DeviceObj)
-External (\_PR.CPU3, DeviceObj)
-External (\_PR.CPU4, DeviceObj)
-External (\_PR.CPU5, DeviceObj)
-External (\_PR.CPU6, DeviceObj)
-External (\_PR.CPU7, DeviceObj)
+External (\_PR.CP00, DeviceObj)
+External (\_PR.CP01, DeviceObj)
+External (\_PR.CP02, DeviceObj)
+External (\_PR.CP03, DeviceObj)
+External (\_PR.CP04, DeviceObj)
+External (\_PR.CP05, DeviceObj)
+External (\_PR.CP06, DeviceObj)
+External (\_PR.CP07, DeviceObj)
 
 /* Notify OS to re-read CPU tables, assuming ^2 CPU count */
 Method (PNOT)
 {
 	If (LGreaterEqual (\PCNT, 2)) {
-		Notify (\_PR.CPU0, 0x81)  // _CST
-		Notify (\_PR.CPU1, 0x81)  // _CST
+		Notify (\_PR.CP00, 0x81)  // _CST
+		Notify (\_PR.CP01, 0x81)  // _CST
 	}
 	If (LGreaterEqual (\PCNT, 4)) {
-		Notify (\_PR.CPU2, 0x81)  // _CST
-		Notify (\_PR.CPU3, 0x81)  // _CST
+		Notify (\_PR.CP02, 0x81)  // _CST
+		Notify (\_PR.CP03, 0x81)  // _CST
 	}
 	If (LGreaterEqual (\PCNT, 8)) {
-		Notify (\_PR.CPU4, 0x81)  // _CST
-		Notify (\_PR.CPU5, 0x81)  // _CST
-		Notify (\_PR.CPU6, 0x81)  // _CST
-		Notify (\_PR.CPU7, 0x81)  // _CST
+		Notify (\_PR.CP04, 0x81)  // _CST
+		Notify (\_PR.CP05, 0x81)  // _CST
+		Notify (\_PR.CP06, 0x81)  // _CST
+		Notify (\_PR.CP07, 0x81)  // _CST
 	}
 }
 
@@ -50,18 +50,18 @@ Method (PNOT)
 Method (PPCN)
 {
 	If (LGreaterEqual (\PCNT, 2)) {
-		Notify (\_PR.CPU0, 0x80)  // _PPC
-		Notify (\_PR.CPU1, 0x80)  // _PPC
+		Notify (\_PR.CP00, 0x80)  // _PPC
+		Notify (\_PR.CP01, 0x80)  // _PPC
 	}
 	If (LGreaterEqual (\PCNT, 4)) {
-		Notify (\_PR.CPU2, 0x80)  // _PPC
-		Notify (\_PR.CPU3, 0x80)  // _PPC
+		Notify (\_PR.CP02, 0x80)  // _PPC
+		Notify (\_PR.CP03, 0x80)  // _PPC
 	}
 	If (LGreaterEqual (\PCNT, 8)) {
-		Notify (\_PR.CPU4, 0x80)  // _PPC
-		Notify (\_PR.CPU5, 0x80)  // _PPC
-		Notify (\_PR.CPU6, 0x80)  // _PPC
-		Notify (\_PR.CPU7, 0x80)  // _PPC
+		Notify (\_PR.CP04, 0x80)  // _PPC
+		Notify (\_PR.CP05, 0x80)  // _PPC
+		Notify (\_PR.CP06, 0x80)  // _PPC
+		Notify (\_PR.CP07, 0x80)  // _PPC
 	}
 }
 
@@ -69,18 +69,18 @@ Method (PPCN)
 Method (TNOT)
 {
 	If (LGreaterEqual (\PCNT, 2)) {
-		Notify (\_PR.CPU0, 0x82)  // _TPC
-		Notify (\_PR.CPU1, 0x82)  // _TPC
+		Notify (\_PR.CP00, 0x82)  // _TPC
+		Notify (\_PR.CP01, 0x82)  // _TPC
 	}
 	If (LGreaterEqual (\PCNT, 4)) {
-		Notify (\_PR.CPU2, 0x82)  // _TPC
-		Notify (\_PR.CPU3, 0x82)  // _TPC
+		Notify (\_PR.CP02, 0x82)  // _TPC
+		Notify (\_PR.CP03, 0x82)  // _TPC
 	}
 	If (LGreaterEqual (\PCNT, 8)) {
-		Notify (\_PR.CPU4, 0x82)  // _TPC
-		Notify (\_PR.CPU5, 0x82)  // _TPC
-		Notify (\_PR.CPU6, 0x82)  // _TPC
-		Notify (\_PR.CPU7, 0x82)  // _TPC
+		Notify (\_PR.CP04, 0x82)  // _TPC
+		Notify (\_PR.CP05, 0x82)  // _TPC
+		Notify (\_PR.CP06, 0x82)  // _TPC
+		Notify (\_PR.CP07, 0x82)  // _TPC
 	}
 }
 
@@ -90,33 +90,33 @@ Method (PPKG)
 	If (LGreaterEqual (\PCNT, 8)) {
 		Return (Package()
 		{
-			\_PR.CPU0,
-			\_PR.CPU1,
-			\_PR.CPU2,
-			\_PR.CPU3,
-			\_PR.CPU4,
-			\_PR.CPU5,
-			\_PR.CPU6,
-			\_PR.CPU7
+			\_PR.CP00,
+			\_PR.CP01,
+			\_PR.CP02,
+			\_PR.CP03,
+			\_PR.CP04,
+			\_PR.CP05,
+			\_PR.CP06,
+			\_PR.CP07
 		})
 	} ElseIf (LGreaterEqual (\PCNT, 4)) {
 		Return (Package ()
 		{
-			\_PR.CPU0,
-			\_PR.CPU1,
-			\_PR.CPU2,
-			\_PR.CPU3
+			\_PR.CP00,
+			\_PR.CP01,
+			\_PR.CP02,
+			\_PR.CP03
 		})
 	} ElseIf (LGreaterEqual (\PCNT, 2)) {
 		Return (Package ()
 		{
-			\_PR.CPU0,
-			\_PR.CPU1
+			\_PR.CP00,
+			\_PR.CP01
 		})
 	} Else {
 		Return (Package ()
 		{
-			\_PR.CPU0
+			\_PR.CP00
 		})
 	}
 }
diff --git a/src/soc/intel/broadwell/acpi/ctdp.asl b/src/soc/intel/broadwell/acpi/ctdp.asl
index 2aefda979d..a2a8fb4d2c 100644
--- a/src/soc/intel/broadwell/acpi/ctdp.asl
+++ b/src/soc/intel/broadwell/acpi/ctdp.asl
@@ -76,16 +76,16 @@ Scope (\_SB.PCI0.MCHC)
 	 *     Package (6) { freq, power, tlat, blat, control, status }
 	 *   }
 	 */
-	External (\_PR.CPU0._PSS)
+	External (\_PR.CP00._PSS)
 	Method (PSSS, 1, NotSerialized)
 	{
 		Store (One, Local0) /* Start at P1 */
-		Store (SizeOf (\_PR.CPU0._PSS), Local1)
+		Store (SizeOf (\_PR.CP00._PSS), Local1)
 
 		While (LLess (Local0, Local1)) {
 			/* Store _PSS entry Control value to Local2 */
 			ShiftRight (DeRefOf (Index (DeRefOf (Index
-			      (\_PR.CPU0._PSS, Local0)), 4)), 8, Local2)
+			      (\_PR.CP00._PSS, Local0)), 4)), 8, Local2)
 			If (LEqual (Local2, Arg0)) {
 				Return (Subtract (Local0, 1))
 			}