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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-12-28 16:54:54 +0200 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-08 15:33:47 +0000 |
commit | c641f7ed9f9083f73ddb69676a74d7e205351baa (patch) | |
tree | 7a81b9621e6c667b0c0a5de268cb7ce08e6c972d /src/soc/intel/broadwell | |
parent | ee2e936f4059d8aad4161d44915a05271df1aaae (diff) |
cpu/intel/car: Prepare for C_ENVIRONMENT_BOOTBLOCK
Pass timestamps and BIST to romstage using the same signature
as C_ENVIRONMENT_BOOTBLOCK will.
Change-Id: Ic90da6b1b5ac3b56c69b593ba447ed8e05c8a4e2
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30492
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell')
-rw-r--r-- | src/soc/intel/broadwell/include/soc/romstage.h | 3 | ||||
-rw-r--r-- | src/soc/intel/broadwell/romstage/romstage.c | 14 |
2 files changed, 11 insertions, 6 deletions
diff --git a/src/soc/intel/broadwell/include/soc/romstage.h b/src/soc/intel/broadwell/include/soc/romstage.h index 17d711fc25..31184f9a02 100644 --- a/src/soc/intel/broadwell/include/soc/romstage.h +++ b/src/soc/intel/broadwell/include/soc/romstage.h @@ -29,8 +29,7 @@ struct romstage_params { void mainboard_romstage_entry(struct romstage_params *params); void romstage_common(struct romstage_params *params); -asmlinkage void *romstage_main(unsigned long bist, uint32_t tsc_lo, - uint32_t tsc_high); + void raminit(struct pei_data *pei_data); struct chipset_power_state; diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c index afc8216677..b89d948eba 100644 --- a/src/soc/intel/broadwell/romstage/romstage.c +++ b/src/soc/intel/broadwell/romstage/romstage.c @@ -18,6 +18,7 @@ #include <arch/io.h> #include <arch/cbfs.h> #include <arch/early_variables.h> +#include <bootblock_common.h> #include <bootmode.h> #include <cbmem.h> #include <console/console.h> @@ -64,8 +65,7 @@ static void platform_enter_postcar(void) } /* Entry from cache-as-ram.inc. */ -asmlinkage void *romstage_main(unsigned long bist, - uint32_t tsc_low, uint32_t tsc_hi) +static void romstage_main(uint64_t tsc, uint32_t bist) { struct romstage_params rp = { .bist = bist, @@ -75,7 +75,7 @@ asmlinkage void *romstage_main(unsigned long bist, post_code(0x30); /* Save initial timestamp from bootblock. */ - timestamp_init((((uint64_t)tsc_hi) << 32) | (uint64_t)tsc_low); + timestamp_init(tsc); /* Save romstage begin */ timestamp_add_now(TS_START_ROMSTAGE); @@ -106,8 +106,14 @@ asmlinkage void *romstage_main(unsigned long bist, mainboard_romstage_entry(&rp); platform_enter_postcar(); +} - return NULL; +/* This wrapper enables easy transition towards C_ENVIRONMENT_BOOTBLOCK, + * keeping changes in cache_as_ram.S easy to manage. + */ +asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist) +{ + romstage_main(base_timestamp, bist); } /* Entry from the mainboard. */ |