diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-06-23 12:54:03 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-08-02 15:53:46 +0000 |
| commit | 35041339dcd59a4a6c5ad29a4d0cf88e8526eed8 (patch) | |
| tree | addd96f8b3b8280eba9b206400c5272ab096dcd6 /src/soc/intel/broadwell | |
| parent | b5d56f9118032159908b98311831d304e1a529f7 (diff) | |
soc/intel/broadwell: Drop early BAR macros
They are used at most once. Use the actual values and drop the macros.
Tested with BUILD_TIMELESS=1, Purism Librem 13 v1 remains identical.
Change-Id: I9c1c3ebbbfa64a5eeea3bd5551c3d0068ac0dab2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55799
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell')
| -rw-r--r-- | src/soc/intel/broadwell/include/soc/iomap.h | 7 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/pei_data.c | 8 |
2 files changed, 4 insertions, 11 deletions
diff --git a/src/soc/intel/broadwell/include/soc/iomap.h b/src/soc/intel/broadwell/include/soc/iomap.h index 3a2cafef8a..0f9f38f145 100644 --- a/src/soc/intel/broadwell/include/soc/iomap.h +++ b/src/soc/intel/broadwell/include/soc/iomap.h @@ -13,11 +13,4 @@ #define GPIO_BASE_ADDRESS 0x1400 #define GPIO_BASE_SIZE 0x400 -/* Temporary addresses used in romstage */ -#define EARLY_GTT_BAR 0xe0000000 -#define EARLY_XHCI_BAR 0xd7000000 -#define EARLY_EHCI_BAR CONFIG_EHCI_BAR -#define EARLY_UART_BAR CONFIG_TTYS0_BASE -#define EARLY_TEMP_MMIO 0xfed08000 - #endif diff --git a/src/soc/intel/broadwell/pei_data.c b/src/soc/intel/broadwell/pei_data.c index 48800ededa..c8fbfcadf7 100644 --- a/src/soc/intel/broadwell/pei_data.c +++ b/src/soc/intel/broadwell/pei_data.c @@ -17,13 +17,13 @@ void broadwell_fill_pei_data(struct pei_data *pei_data) pei_data->usbdebug = CONFIG(USBDEBUG); pei_data->pciexbar = CONFIG_MMCONF_BASE_ADDRESS; pei_data->smbusbar = CONFIG_FIXED_SMBUS_IO_BASE; - pei_data->ehcibar = EARLY_EHCI_BAR; - pei_data->xhcibar = EARLY_XHCI_BAR; - pei_data->gttbar = EARLY_GTT_BAR; + pei_data->ehcibar = CONFIG_EHCI_BAR; + pei_data->xhcibar = 0xd7000000; + pei_data->gttbar = 0xe0000000; pei_data->pmbase = ACPI_BASE_ADDRESS; pei_data->gpiobase = GPIO_BASE_ADDRESS; pei_data->tseg_size = CONFIG_SMM_TSEG_SIZE; - pei_data->temp_mmio_base = EARLY_TEMP_MMIO; + pei_data->temp_mmio_base = 0xfed08000; pei_data->tx_byte = &send_to_console; pei_data->ddr_refresh_2x = 1; } |