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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-09-28 00:20:27 +0300
committerPatrick Georgi <pgeorgi@google.com>2019-10-02 11:21:10 +0000
commitd5f645c6cde230004ee5af6c62d451d1329928e9 (patch)
treeeb87509c96e5ee1fa26e87594c75a399d92402e2 /src/soc/intel/broadwell
parentd3d38c95b7c23c5bd455d35e1b5bef0bce7b2cc5 (diff)
soc/intel: Replace config_of_path() with config_of_soc()
The previously provided device path made no difference, all integrated PCI devices point back to the same chip_info structure. Change reduces the exposure of various SA_DEVFN_xx and PCH_DEVFN_xx from (ugly) soc/pci_devs.h. Change-Id: Ibf13645fdd3ef7fd3d5c8217bb24d7ede045c790 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35656 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/broadwell')
-rw-r--r--src/soc/intel/broadwell/acpi.c2
-rw-r--r--src/soc/intel/broadwell/cpu.c4
-rw-r--r--src/soc/intel/broadwell/romstage/pch.c2
3 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c
index 705bc0089e..7acde68db1 100644
--- a/src/soc/intel/broadwell/acpi.c
+++ b/src/soc/intel/broadwell/acpi.c
@@ -390,7 +390,7 @@ static void generate_C_state_entries(void)
int *set;
int i;
- config_t *config = config_of_path(SA_DEVFN_ROOT);
+ config_t *config = config_of_soc();
if (config->s0ix_enable)
set = cstate_set_s0ix;
diff --git a/src/soc/intel/broadwell/cpu.c b/src/soc/intel/broadwell/cpu.c
index 54a695eec1..8fe66dce5b 100644
--- a/src/soc/intel/broadwell/cpu.c
+++ b/src/soc/intel/broadwell/cpu.c
@@ -196,7 +196,7 @@ static int pcode_mailbox_write(u32 command, u32 data)
static void initialize_vr_config(void)
{
- config_t *conf = config_of_path(SA_DEVFN_ROOT);
+ config_t *conf = config_of_soc();
msr_t msr;
printk(BIOS_DEBUG, "Initializing VR config.\n");
@@ -450,7 +450,7 @@ static void configure_c_states(void)
static void configure_thermal_target(void)
{
- config_t *conf = config_of_path(SA_DEVFN_ROOT);
+ config_t *conf = config_of_soc();
msr_t msr;
diff --git a/src/soc/intel/broadwell/romstage/pch.c b/src/soc/intel/broadwell/romstage/pch.c
index 0bd4ccd471..af8ea53dea 100644
--- a/src/soc/intel/broadwell/romstage/pch.c
+++ b/src/soc/intel/broadwell/romstage/pch.c
@@ -78,7 +78,7 @@ static void pch_enable_lpc(void)
/* Lookup device tree in romstage */
const config_t *config;
- config = config_of_path(PCH_DEVFN_LPC);
+ config = config_of_soc();
pci_write_config32(PCH_DEV_LPC, LPC_GEN1_DEC, config->gen1_dec);
pci_write_config32(PCH_DEV_LPC, LPC_GEN2_DEC, config->gen2_dec);