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authorAaron Durbin <adurbin@chromium.org>2016-07-13 23:21:41 -0500
committerAaron Durbin <adurbin@chromium.org>2016-07-15 08:32:49 +0200
commit9e6d143a82a852ddfa64f20ceb8695939c1dace1 (patch)
tree147ee77b05213ace8941dbebe360df972f026517 /src/soc/intel/broadwell/xhci.c
parentc159bb0d76af801bca405e729c5f4b97a18a5a1d (diff)
soc/intel/broadwell: use common Intel ACPI hardware definitions
Transition to using the common Intel ACPI hardware definitions generic ACPI definitions. BUG=chrome-os-partner:54977 Change-Id: I99d909ee72c3abebb1e9c8ebf44137465264bf0d Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/15673 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/broadwell/xhci.c')
-rw-r--r--src/soc/intel/broadwell/xhci.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/broadwell/xhci.c b/src/soc/intel/broadwell/xhci.c
index 8453165d76..75a63cfca3 100644
--- a/src/soc/intel/broadwell/xhci.c
+++ b/src/soc/intel/broadwell/xhci.c
@@ -18,6 +18,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
+#include <arch/acpi.h>
#include <arch/io.h>
#include <soc/ramstage.h>
#include <soc/xhci.h>
@@ -146,7 +147,7 @@ void usb_xhci_sleep_prepare(device_t dev, u8 slp_typ)
u8 *mem_base = usb_xhci_mem_base(dev);
u8 is_broadwell = !!(cpu_family_model() == BROADWELL_FAMILY_ULT);
- if (!mem_base || slp_typ < 3)
+ if (!mem_base || slp_typ < ACPI_S3)
return;
/* Set D0 state */