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author | Uwe Poeche <uwe.poeche@siemens.com> | 2019-09-24 09:44:58 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-24 07:50:02 +0000 |
commit | ed309e58b0d44f7757f7144a995ca95a94e8a52a (patch) | |
tree | b49fc915988eb5bc310bbd956cd5d7d1ece5c024 /src/soc/intel/broadwell/smi.c | |
parent | 285975dbba8c7f3bbb9f9950e79a30bb983d5123 (diff) |
soc/intel/fsp_baytrail: use designware I2C driver
Refactor I2C driver for fsp_baytrail to match the coreboot supported I2C
bus device structure. The internal I2C controllers are now handled by
the generic PCI driver approach and generic I2C access is enabled.
As orientation for the I2C code the actual solution from
soc/intel/apollolake I2C was taken. All the I2C specific parts were
removed from lpss.c and have been implemented in the I2C driver.
Future merge to soc/intel/common/block/i2c/i2c.c would be possible.
With this patch I2C chip devices can now be used in devicetree.
TEST=Booted siemens/tcu3 and verified that access to PTN3460 worked.
Change-Id: I3b87bd7c27e4c1afcce7cd4225cca02599f43c60
Signed-off-by: Uwe Poeche <uwe.poeche@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36062
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/soc/intel/broadwell/smi.c')
0 files changed, 0 insertions, 0 deletions