diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2019-05-12 15:25:54 +0200 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2019-05-14 23:22:26 +0000 |
commit | 325865db5683f32d846cc452504da00ec8d53710 (patch) | |
tree | 8522419c7e18c17c8a73462ceda33eed45100c12 /src/soc/intel/broadwell/romstage | |
parent | cadc70f7974db25144381b3ea26d4b660233f4dd (diff) |
soc/intel/broadwell: Don't use a pointer for pei_data
To improve the bootflow, the scope of the pei_data needs to be
extended.
Change-Id: Ic6d91692a7bf9218b81da5bb36b5b26dabac454e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32762
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/soc/intel/broadwell/romstage')
-rw-r--r-- | src/soc/intel/broadwell/romstage/romstage.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c index 7847829ac6..2a3ac8b8e6 100644 --- a/src/soc/intel/broadwell/romstage/romstage.c +++ b/src/soc/intel/broadwell/romstage/romstage.c @@ -68,7 +68,6 @@ static void romstage_main(uint64_t tsc, uint32_t bist) { struct romstage_params rp = { .bist = bist, - .pei_data = NULL, }; post_code(0x30); @@ -125,7 +124,7 @@ void romstage_common(struct romstage_params *params) timestamp_add_now(TS_BEFORE_INITRAM); - params->pei_data->boot_mode = params->power_state->prev_sleep_state; + params->pei_data.boot_mode = params->power_state->prev_sleep_state; #if CONFIG(ELOG_BOOT_COUNT) if (params->power_state->prev_sleep_state != ACPI_S3) @@ -140,7 +139,7 @@ void romstage_common(struct romstage_params *params) ¶ms->power_state->hsio_checksum); /* Initialize RAM */ - raminit(params->pei_data); + raminit(¶ms->pei_data); timestamp_add_now(TS_AFTER_INITRAM); |