diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-10-13 20:49:23 +0200 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2020-10-23 18:08:51 +0000 |
commit | dd558fd0cf81886fdc1b6f2bb5045031a69f55cd (patch) | |
tree | d3930a6e2ea25a1fd036b57f171e51e0ede6544a /src/soc/intel/broadwell/romstage/Makefile.inc | |
parent | f2e2b9688e48bef26dcb6a178a01b92073333e4e (diff) |
soc/intel/broadwell: Use common early SMBus code
Disabling interrupts and clearing errors was being done twice, once in
the `smbus_enable_iobar` reg-script, and another in `enable_smbus`.
Change-Id: I58558996bd693b302764965a5bed8b96db363833
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46355
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/broadwell/romstage/Makefile.inc')
-rw-r--r-- | src/soc/intel/broadwell/romstage/Makefile.inc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/broadwell/romstage/Makefile.inc b/src/soc/intel/broadwell/romstage/Makefile.inc index a53cd95cd5..edfec30fdc 100644 --- a/src/soc/intel/broadwell/romstage/Makefile.inc +++ b/src/soc/intel/broadwell/romstage/Makefile.inc @@ -5,6 +5,5 @@ romstage-y += power_state.c romstage-y += raminit.c romstage-y += report_platform.c romstage-y += romstage.c -romstage-y += smbus.c romstage-y += systemagent.c romstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart.c |