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authorAngel Pons <th3fanbus@gmail.com>2020-11-23 13:15:19 +0100
committerAngel Pons <th3fanbus@gmail.com>2021-01-24 12:03:55 +0000
commit9d733def594cd9b982260743d2c48b3abad17255 (patch)
tree1aa4f16e8e42a4edf5b38a0f9d117bb4d32920be /src/soc/intel/broadwell/romstage.c
parent739a6ad1ac098231c34587c69237906e721b7e91 (diff)
soc/intel/broadwell: Use Haswell CPU headers
Now that the boards use Haswell's CPU code, Broadwell can be updated. Change-Id: If07e5272f07edb59bb18eef1f80d7d5807b26e66 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46949 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell/romstage.c')
-rw-r--r--src/soc/intel/broadwell/romstage.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/romstage.c b/src/soc/intel/broadwell/romstage.c
index 2e5db76ce9..8e884d5d35 100644
--- a/src/soc/intel/broadwell/romstage.c
+++ b/src/soc/intel/broadwell/romstage.c
@@ -3,6 +3,7 @@
#include <acpi/acpi.h>
#include <arch/romstage.h>
#include <console/console.h>
+#include <cpu/intel/haswell/haswell.h>
#include <elog.h>
#include <romstage_handoff.h>
#include <soc/gpio.h>