diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-11-23 13:15:19 +0100 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2021-01-24 12:03:55 +0000 |
| commit | 9d733def594cd9b982260743d2c48b3abad17255 (patch) | |
| tree | 1aa4f16e8e42a4edf5b38a0f9d117bb4d32920be /src/soc/intel/broadwell/report_platform.c | |
| parent | 739a6ad1ac098231c34587c69237906e721b7e91 (diff) | |
soc/intel/broadwell: Use Haswell CPU headers
Now that the boards use Haswell's CPU code, Broadwell can be updated.
Change-Id: If07e5272f07edb59bb18eef1f80d7d5807b26e66
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46949
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell/report_platform.c')
| -rw-r--r-- | src/soc/intel/broadwell/report_platform.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/src/soc/intel/broadwell/report_platform.c b/src/soc/intel/broadwell/report_platform.c index 4ed84d7cea..018ea24a56 100644 --- a/src/soc/intel/broadwell/report_platform.c +++ b/src/soc/intel/broadwell/report_platform.c @@ -5,27 +5,28 @@ #include <console/console.h> #include <device/pci.h> #include <string.h> +#include <cpu/intel/haswell/haswell.h> #include <cpu/intel/microcode.h> #include <cpu/x86/msr.h> -#include <soc/cpu.h> #include <soc/pch.h> #include <soc/pci_devs.h> #include <soc/romstage.h> #include <soc/systemagent.h> +/* FIXME: Needs an update */ static struct { u32 cpuid; const char *name; } cpu_table[] = { - { CPUID_HASWELL_A0, "Haswell A0" }, - { CPUID_HASWELL_B0, "Haswell B0" }, - { CPUID_HASWELL_C0, "Haswell C0" }, - { CPUID_HASWELL_ULT_B0, "Haswell ULT B0" }, - { CPUID_HASWELL_ULT, "Haswell ULT C0 or D0" }, - { CPUID_HASWELL_HALO, "Haswell Perf Halo" }, - { CPUID_BROADWELL_C0, "Broadwell C0" }, - { CPUID_BROADWELL_D0, "Broadwell D0" }, - { CPUID_BROADWELL_E0, "Broadwell E0 or F0" }, + { CPUID_HASWELL_A0, "Haswell A0" }, + { CPUID_HASWELL_B0, "Haswell B0" }, + { CPUID_HASWELL_C0, "Haswell C0" }, + { CPUID_HASWELL_ULT_B0, "Haswell ULT B0" }, + { CPUID_HASWELL_ULT_C0, "Haswell ULT C0 or D0" }, + { CPUID_CRYSTALWELL_C0, "Haswell Perf Halo" }, + { CPUID_BROADWELL_ULT_C0, "Broadwell C0" }, + { CPUID_BROADWELL_ULT_D0, "Broadwell D0" }, + { CPUID_BROADWELL_ULT_E0, "Broadwell E0 or F0" }, }; static struct { |