diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-09-27 12:19:52 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-09-29 10:04:40 +0000 |
| commit | 2fd1e47313aa3132be1bd8c3210a694980e6e379 (patch) | |
| tree | a6932f77eee8ac657468fa2e0f962b8338ced04c /src/soc/intel/broadwell/pch | |
| parent | 286c771657036152302136369fb067fd98477cd5 (diff) | |
{sb,soc}/intel: Drop PRMx from GNVS
These fields are never used in the code. Drop them.
Change-Id: Icd07f2d704c19126bf6df4d740c21d5a1342061b
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57983
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/soc/intel/broadwell/pch')
| -rw-r--r-- | src/soc/intel/broadwell/pch/acpi/globalnvs.asl | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/intel/broadwell/pch/acpi/globalnvs.asl b/src/soc/intel/broadwell/pch/acpi/globalnvs.asl index ae5cfb539c..ffca182ae5 100644 --- a/src/soc/intel/broadwell/pch/acpi/globalnvs.asl +++ b/src/soc/intel/broadwell/pch/acpi/globalnvs.asl @@ -7,14 +7,14 @@ Field (GNVS, ByteAcc, NoLock, Preserve) /* Miscellaneous */ , 16, // 0x00 - Operating System SMIF, 8, // 0x02 - SMI function - PRM0, 8, // 0x03 - SMI function parameter - PRM1, 8, // 0x04 - SMI function parameter + , 8, // 0x03 - SMI function parameter + , 8, // 0x04 - SMI function parameter SCIF, 8, // 0x05 - SCI function - PRM2, 8, // 0x06 - SCI function parameter - PRM3, 8, // 0x07 - SCI function parameter + , 8, // 0x06 - SCI function parameter + , 8, // 0x07 - SCI function parameter , 8, // 0x08 - Global Lock function for EC - PRM4, 8, // 0x09 - Lock function parameter - PRM5, 8, // 0x0a - Lock function parameter + , 8, // 0x09 - Lock function parameter + , 8, // 0x0a - Lock function parameter , 8, // 0x0b - Processor Count PPCM, 8, // 0x0c - Max PPC State TMPS, 8, // 0x0d - Temperature Sensor ID |