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authorAngel Pons <th3fanbus@gmail.com>2020-10-26 00:40:46 +0100
committerMichael Niewöhner <foss@mniewoehner.de>2020-11-13 13:26:02 +0000
commited222f12ec367aa2fdf55c9516dd9eafd64303aa (patch)
treeb74bff606bb472616f0a3dc110fe94a309c96851 /src/soc/intel/broadwell/pch
parent1500dd081b386db9b03ff78e74831cf6c9f88ba7 (diff)
soc/intel/broadwell: Split up acpi.c
Change-Id: Ie9c57b6f5c226cee8797027941fa03e69de52923 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46796 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell/pch')
-rw-r--r--src/soc/intel/broadwell/pch/Makefile.inc1
-rw-r--r--src/soc/intel/broadwell/pch/acpi.c55
2 files changed, 56 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/pch/Makefile.inc b/src/soc/intel/broadwell/pch/Makefile.inc
index 1c196136c4..119534fccd 100644
--- a/src/soc/intel/broadwell/pch/Makefile.inc
+++ b/src/soc/intel/broadwell/pch/Makefile.inc
@@ -1,5 +1,6 @@
bootblock-y += bootblock.c
+ramstage-y += acpi.c
ramstage-y += adsp.c
romstage-y += early_pch.c
ramstage-$(CONFIG_ELOG) += elog.c
diff --git a/src/soc/intel/broadwell/pch/acpi.c b/src/soc/intel/broadwell/pch/acpi.c
new file mode 100644
index 0000000000..712bb46f8a
--- /dev/null
+++ b/src/soc/intel/broadwell/pch/acpi.c
@@ -0,0 +1,55 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi.h>
+#include <acpi/acpi_gnvs.h>
+#include <acpi/acpigen.h>
+#include <arch/ioapic.h>
+#include <arch/smp/mpspec.h>
+#include <cbmem.h>
+#include <device/pci_ops.h>
+#include <cpu/x86/smm.h>
+#include <console/console.h>
+#include <types.h>
+#include <string.h>
+#include <arch/cpu.h>
+#include <cpu/x86/msr.h>
+#include <cpu/intel/turbo.h>
+#include <ec/google/chromeec/ec.h>
+#include <vendorcode/google/chromeos/gnvs.h>
+#include <soc/acpi.h>
+#include <soc/cpu.h>
+#include <soc/iomap.h>
+#include <soc/lpc.h>
+#include <soc/msr.h>
+#include <soc/pci_devs.h>
+#include <soc/pm.h>
+#include <soc/systemagent.h>
+#include <soc/intel/broadwell/chip.h>
+
+unsigned long acpi_fill_madt(unsigned long current)
+{
+ int sci = acpi_sci_irq();
+ acpi_madt_irqoverride_t *irqovr;
+ uint16_t flags = MP_IRQ_TRIGGER_LEVEL;
+
+ /* Local APICs */
+ current = acpi_create_madt_lapics(current);
+
+ /* IOAPIC */
+ current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, 2, IO_APIC_ADDR, 0);
+
+ /* INT_SRC_OVR */
+ irqovr = (void *)current;
+ current += acpi_create_madt_irqoverride(irqovr, 0, 0, 2, 0);
+
+ if (sci >= 20)
+ flags |= MP_IRQ_POLARITY_LOW;
+ else
+ flags |= MP_IRQ_POLARITY_HIGH;
+
+ /* SCI */
+ irqovr = (void *)current;
+ current += acpi_create_madt_irqoverride(irqovr, 0, sci, sci, flags);
+
+ return current;
+}