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authorAngel Pons <th3fanbus@gmail.com>2021-01-28 15:09:39 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-02-12 07:51:22 +0000
commit64c6a746ac78a207703d18b806cb0baa223ebbf5 (patch)
tree6014bb7e80b6b9699295d945d24487dc60ff4233 /src/soc/intel/broadwell/pch/acpi/pch.asl
parent75439de2d9c5a1c2a043780d88e8237d94184cc1 (diff)
soc/intel/broadwell: Use southbridge common RCBA
Tested with BUILD_TIMELESS=1, Purism Librem 13 v1 remains identical. Change-Id: I94953bed3f331848271464bee829f8209167f150 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50041 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/broadwell/pch/acpi/pch.asl')
-rw-r--r--src/soc/intel/broadwell/pch/acpi/pch.asl2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/broadwell/pch/acpi/pch.asl b/src/soc/intel/broadwell/pch/acpi/pch.asl
index b7d6838f51..0e90c957d4 100644
--- a/src/soc/intel/broadwell/pch/acpi/pch.asl
+++ b/src/soc/intel/broadwell/pch/acpi/pch.asl
@@ -13,7 +13,7 @@ Scope (\)
}
// Root Complex Register Block
- OperationRegion (RCRB, SystemMemory, RCBA_BASE_ADDRESS, RCBA_BASE_SIZE)
+ OperationRegion (RCRB, SystemMemory, CONFIG_FIXED_RCBA_MMIO_BASE, CONFIG_RCBA_LENGTH)
Field (RCRB, DWordAcc, Lock, Preserve)
{
Offset (0x3404), // High Performance Timer Configuration