diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-10-25 21:11:58 +0100 |
---|---|---|
committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-11-13 12:02:43 +0000 |
commit | 56d37fbe6f65d6c92a082d30baf13e79331dcebd (patch) | |
tree | 86f387f2f117828125e840f808188ece09480d61 /src/soc/intel/broadwell/pch/acpi/ehci.asl | |
parent | e53dfe0cfba9a773079a7229b05ed4b4c5e9e3c4 (diff) |
soc/intel/broadwell/pch/acpi: Clean up cosmetics
Use ASL 2.0 syntax where possible and uniformize code style to match the
IASL disassembly. Some `Store` in gpio.asl change the binary if touched.
Tested with BUILD_TIMELESS=1, Google Buddy does not change.
Change-Id: Ic13c081fd7ee2212d851cc14263c1e2fd8970072
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46778
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell/pch/acpi/ehci.asl')
-rw-r--r-- | src/soc/intel/broadwell/pch/acpi/ehci.asl | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/src/soc/intel/broadwell/pch/acpi/ehci.asl b/src/soc/intel/broadwell/pch/acpi/ehci.asl index c02bc1a179..632b19fc10 100644 --- a/src/soc/intel/broadwell/pch/acpi/ehci.asl +++ b/src/soc/intel/broadwell/pch/acpi/ehci.asl @@ -4,26 +4,25 @@ Device (EHCI) { - Name(_ADR, 0x001d0000) + Name (_ADR, 0x001d0000) Name (_PRW, Package(){ 0x6d, 3 }) // Leave USB ports on for to allow Wake from USB - Method(_S3D,0) // Highest D State in S3 State + Method (_S3D, 0) // Highest D State in S3 State { Return (2) } - Method(_S4D,0) // Highest D State in S4 State + Method (_S4D, 0) // Highest D State in S4 State { Return (2) } Device (HUB7) { - Name (_ADR, 0x00000000) + Name (_ADR, 0) - // How many are there? Device (PRT1) { Name (_ADR, 1) } // USB Port 0 Device (PRT2) { Name (_ADR, 2) } // USB Port 1 Device (PRT3) { Name (_ADR, 3) } // USB Port 2 |