summaryrefslogtreecommitdiff
path: root/src/soc/intel/broadwell/me.c
diff options
context:
space:
mode:
authorKevin Paul Herbert <kph@meraki.net>2014-12-24 18:43:20 -0800
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2015-02-15 08:50:22 +0100
commitbde6d309dfafe58732ec46314a2d4c08974b62d4 (patch)
tree17ba00565487ddfbb5759c96adfbb3fffe2a4550 /src/soc/intel/broadwell/me.c
parent4b10dec1a66122b515b2191f823d7fd379ec655f (diff)
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
On x86, change the type of the address parameter in read8()/read16/read32()/write8()/write16()/write32() to be a pointer, instead of unsigned long. Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330 Signed-off-by: Kevin Paul Herbert <kph@meraki.net> Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/7784 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/broadwell/me.c')
-rw-r--r--src/soc/intel/broadwell/me.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/broadwell/me.c b/src/soc/intel/broadwell/me.c
index de043f4dea..fd28cfe5e6 100644
--- a/src/soc/intel/broadwell/me.c
+++ b/src/soc/intel/broadwell/me.c
@@ -60,7 +60,7 @@ static const char *me_bios_path_values[] = {
static int intel_me_read_mbp(me_bios_payload *mbp_data, device_t dev);
/* MMIO base address for MEI interface */
-static u32 mei_base_address;
+static u8 *mei_base_address;
void intel_me_mbp_clear(device_t dev);
#if CONFIG_DEBUG_INTEL_ME
@@ -572,7 +572,7 @@ void intel_me_finalize(void)
u32 reg32;
/* S3 path will have hidden this device already */
- if (!mei_base_address || mei_base_address == 0xfffffff0)
+ if (!mei_base_address || mei_base_address == (u8 *)0xfffffff0)
return;
#if CONFIG_ME_MBP_CLEAR_LATE
@@ -710,7 +710,7 @@ static int intel_mei_setup(device_t dev)
printk(BIOS_DEBUG, "ME: MEI resource not present!\n");
return -1;
}
- mei_base_address = res->base;
+ mei_base_address = res2mmio(res, 0, 0);
/* Ensure Memory and Bus Master bits are set */
reg32 = pci_read_config32(dev, PCI_COMMAND);