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authorMartin Roth <martinroth@google.com>2017-06-24 21:34:29 -0600
committerMartin Roth <martinroth@google.com>2017-07-13 23:54:32 +0000
commite6ff1596e7417d24746162b3a567bcb6dd9ef988 (patch)
tree36db0c03c6122c9b31d0f25c40a2f5745371a179 /src/soc/intel/broadwell/lpc.c
parentfed4303b45aa3c8ba98cd2ab90cf5bf023fc6aae (diff)
soc/intel: add IS_ENABLED() around Kconfig symbol references
Change-Id: I3c5f9e0d3d1efdd83442ce724043729c8648ea64 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/20348 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell/lpc.c')
-rw-r--r--src/soc/intel/broadwell/lpc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c
index 36e34fe3fc..4430e73b46 100644
--- a/src/soc/intel/broadwell/lpc.c
+++ b/src/soc/intel/broadwell/lpc.c
@@ -221,7 +221,7 @@ static const struct reg_script pch_misc_init_script[] = {
REG_MMIO_OR32(RCBA_BASE_ADDRESS + 0x1114, (1 << 15) | (1 << 14)),
/* Setup SERIRQ, enable continuous mode */
REG_PCI_OR8(SERIRQ_CNTL, (1 << 7) | (1 << 6)),
-#if !CONFIG_SERIRQ_CONTINUOUS_MODE
+#if !IS_ENABLED(CONFIG_SERIRQ_CONTINUOUS_MODE)
REG_PCI_RMW8(SERIRQ_CNTL, ~(1 << 6), 0),
#endif
REG_SCRIPT_END
@@ -431,7 +431,7 @@ static void pch_cg_init(device_t dev)
static void pch_set_acpi_mode(void)
{
-#if CONFIG_HAVE_SMI_HANDLER
+#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
if (!acpi_is_wakeup_s3()) {
printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n");
outb(APM_CNT_ACPI_DISABLE, APM_CNT);