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authorAngel Pons <th3fanbus@gmail.com>2021-01-28 12:33:47 +0100
committerAngel Pons <th3fanbus@gmail.com>2021-01-30 23:10:33 +0000
commit33bededa117fee1d529b4d461cf82d79d22e70d2 (patch)
tree5bb1f489099a262cb36f6fbc9bc580d0d4b828ff /src/soc/intel/broadwell/include
parent50632878bf9dbae54fac4b48070482531002a290 (diff)
soc/intel/broadwell: Use common SMBus code
Change-Id: I74b21bfde4b76ccb0d432b00c25095f708b1d761 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50030 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell/include')
-rw-r--r--src/soc/intel/broadwell/include/soc/iomap.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/intel/broadwell/include/soc/iomap.h b/src/soc/intel/broadwell/include/soc/iomap.h
index 241569efa8..7af6845eed 100644
--- a/src/soc/intel/broadwell/include/soc/iomap.h
+++ b/src/soc/intel/broadwell/include/soc/iomap.h
@@ -38,9 +38,6 @@
#define GPIO_BASE_ADDRESS 0x1400
#define GPIO_BASE_SIZE 0x400
-#define SMBUS_BASE_ADDRESS 0x0400
-#define SMBUS_BASE_SIZE 0x10
-
/* Temporary addresses used in romstage */
#define EARLY_GTT_BAR 0xe0000000
#define EARLY_XHCI_BAR 0xd7000000