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authorAngel Pons <th3fanbus@gmail.com>2020-11-23 13:15:19 +0100
committerAngel Pons <th3fanbus@gmail.com>2021-01-24 12:03:55 +0000
commit9d733def594cd9b982260743d2c48b3abad17255 (patch)
tree1aa4f16e8e42a4edf5b38a0f9d117bb4d32920be /src/soc/intel/broadwell/include
parent739a6ad1ac098231c34587c69237906e721b7e91 (diff)
soc/intel/broadwell: Use Haswell CPU headers
Now that the boards use Haswell's CPU code, Broadwell can be updated. Change-Id: If07e5272f07edb59bb18eef1f80d7d5807b26e66 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46949 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell/include')
-rw-r--r--src/soc/intel/broadwell/include/soc/romstage.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/intel/broadwell/include/soc/romstage.h b/src/soc/intel/broadwell/include/soc/romstage.h
index 721e23f5f5..646ad0e5dc 100644
--- a/src/soc/intel/broadwell/include/soc/romstage.h
+++ b/src/soc/intel/broadwell/include/soc/romstage.h
@@ -20,8 +20,6 @@ struct chipset_power_state;
struct chipset_power_state *fill_power_state(void);
void report_platform_info(void);
-void set_max_freq(void);
-
void systemagent_early_init(void);
void pch_early_init(void);
void pch_uart_init(void);