soc/intel/broadwell/pch: Drop device NVS remainders

Now that device NVS is no longer used as such, stop using it to store
ACPI device settings consumed by the SSDT generator. Instead, provide
the get_acpi_device_state() function to allow saving ACPI device BARs
and activation state from other compilation units. Also, introduce an
enum and a struct to ease handling device state.

Tested on out-of-tree Compal LA-A992P, SerialIO SSDT does not change.

Change-Id: I9e70bf71e808651cb504399dcee489a4d1a70e67
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52521
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

2 files changed, 21 insertions, 24 deletions

diff --git a/src/soc/intel/broadwell/include/soc/device_nvs.h b/src/soc/intel/broadwell/include/soc/device_nvs.h
deleted file mode 100644
index 27304b573d..0000000000
--- a/src/soc/intel/broadwell/include/soc/device_nvs.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef _BROADWELL_DEVICE_NVS_H_
-#define _BROADWELL_DEVICE_NVS_H_
-
-#include <stdint.h>
-
-#define SIO_NVS_DMA		0
-#define SIO_NVS_I2C0		1
-#define SIO_NVS_I2C1		2
-#define SIO_NVS_SPI0		3
-#define SIO_NVS_SPI1		4
-#define SIO_NVS_UART0		5
-#define SIO_NVS_UART1		6
-#define SIO_NVS_SDIO		7
-#define SIO_NVS_ADSP		8
-
-struct __packed device_nvs {
-	u8	enable[9];
-	u32	bar0[9];
-	u32	bar1[9];
-};
-
-#endif
diff --git a/src/soc/intel/broadwell/include/soc/pch.h b/src/soc/intel/broadwell/include/soc/pch.h
index 8089f5bdb0..8367a39b7f 100644
--- a/src/soc/intel/broadwell/include/soc/pch.h
+++ b/src/soc/intel/broadwell/include/soc/pch.h
@@ -4,6 +4,7 @@
 #define _BROADWELL_PCH_H_
 
 #include <acpi/acpi.h>
+#include <types.h>
 
 /* Haswell ULT Pch (LynxPoint-LP) */
 #define PCH_LPT_LP_SAMPLE	0x9c41
@@ -25,6 +26,25 @@
 #define PCH_PCS			0x84
 #define  PCH_PCS_PS_D3HOT	3
 
+enum pch_acpi_device {
+	PCH_ACPI_SDMA = 0,
+	PCH_ACPI_I2C0,
+	PCH_ACPI_I2C1,
+	PCH_ACPI_GSPI0,
+	PCH_ACPI_GSPI1,
+	PCH_ACPI_UART0,
+	PCH_ACPI_UART1,
+	PCH_ACPI_SDIO,
+	PCH_ACPI_ADSP,
+	NUM_PCH_ACPI_DEVICES,
+};
+
+struct pch_acpi_device_state {
+	bool enable;
+	uint32_t bar0;
+	uint32_t bar1;
+};
+
 u8 pch_revision(void);
 u16 pch_type(void);
 int pch_is_wpt(void);
@@ -32,6 +52,7 @@ int pch_is_wpt_ulx(void);
 u32 pch_read_soft_strap(int id);
 void pch_disable_devfn(struct device *dev);
 
+struct pch_acpi_device_state *get_acpi_device_state(enum pch_acpi_device dev_index);
 void acpi_create_serialio_ssdt(acpi_header_t *ssdt);
 
 void broadwell_pch_finalize(void);