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authorAngel Pons <th3fanbus@gmail.com>2020-10-23 22:01:44 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-10-30 00:46:29 +0000
commit9eaca7dcf42c173645627e5523e5d8d6b7b74b76 (patch)
tree0ca0e61db1520cb131e076dfa88f814a4c9361f0 /src/soc/intel/broadwell/gma.c
parent37164ff60927ad965915af28f593c491a7623908 (diff)
soc/intel/broadwell: Get rid of `cpu_is_ult`
It is only used in a single file, on two functions that already check whether coreboot is running on a Haswell or a Broadwell processor. Change-Id: I86e1061f722e6d6855190c2fd863d85fc24a1ee0 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46708 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell/gma.c')
-rw-r--r--src/soc/intel/broadwell/gma.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/soc/intel/broadwell/gma.c b/src/soc/intel/broadwell/gma.c
index c77f5c4476..3889be3513 100644
--- a/src/soc/intel/broadwell/gma.c
+++ b/src/soc/intel/broadwell/gma.c
@@ -364,6 +364,7 @@ static int igd_get_cdclk_haswell(u32 *const cdsel, int *const inform_pc,
/* Check for ULX GT1 or GT2 */
const int devid = pci_read_config16(dev, PCI_DEVICE_ID);
+ const int cpu_is_ult = cpu_family_model() == HASWELL_FAMILY_ULT;
const int gpu_is_ulx = devid == IGD_HASWELL_ULX_GT1 ||
devid == IGD_HASWELL_ULX_GT2;
@@ -378,7 +379,7 @@ static int igd_get_cdclk_haswell(u32 *const cdsel, int *const inform_pc,
*/
if (gpu_is_ulx && cdclk <= GT_CDCLK_337)
cdclk = GT_CDCLK_337;
- else if (gpu_is_ulx || cpu_is_ult() ||
+ else if (gpu_is_ulx || cpu_is_ult ||
cdclk == GT_CDCLK_337 || cdclk == GT_CDCLK_450)
cdclk = GT_CDCLK_450;
else
@@ -398,6 +399,7 @@ static int igd_get_cdclk_broadwell(u32 *const cdsel, int *const inform_pc,
/* Check for ULX */
const int devid = pci_read_config16(dev, PCI_DEVICE_ID);
+ const int cpu_is_ult = cpu_family_model() == BROADWELL_FAMILY_ULT;
const int gpu_is_ulx = devid == IGD_BROADWELL_Y_GT2;
/* Inform power controller of upcoming frequency change */
@@ -428,7 +430,7 @@ static int igd_get_cdclk_broadwell(u32 *const cdsel, int *const inform_pc,
(gpu_is_ulx && cdclk == GT_CDCLK_DEFAULT))
cdclk = GT_CDCLK_450;
else if (cdclk == GT_CDCLK_540 || gpu_is_ulx ||
- (cpu_is_ult() && cdclk == GT_CDCLK_DEFAULT))
+ (cpu_is_ult && cdclk == GT_CDCLK_DEFAULT))
cdclk = GT_CDCLK_540;
else
cdclk = GT_CDCLK_675;