diff options
| author | David Hendricks <dhendrix@chromium.org> | 2014-09-27 20:04:49 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-02 17:28:14 +0200 |
| commit | 767d245ebf2d6d797bf759d23778553ed6f2a0b2 (patch) | |
| tree | 247940814ab4844978218296b1e81409d9798d74 /src/soc/intel/broadwell/chip.h | |
| parent | 842978631580333becf635cc78f1901615d34929 (diff) | |
chromeec: Add wakeup delay after SPI /CS assertion
Some ECs may require a few microseconds to ramp up their clock after
being awaken by /CS assertion. This adds a Kconfig variable that can
be overridden at the mainboard-level which will force a delay between
asserting /CS and beginning a transfer.
BUG=chrome-os-partner:32223
BRANCH=none
TEST=verified ~100us delay using logic analyzer
Change-Id: I6d9b8beaa808252f008efb10e7448afdf96d2004
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: ec6b10e4e3f0362dea0dc8046cfd4e4615a42585
Original-Change-Id: Ibba356e4af18f80a7da73c96dadfda0f25251381
Original-Signed-off-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/220242
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-by: Alexandru Stan <amstan@chromium.org>
Reviewed-on: http://review.coreboot.org/9217
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/broadwell/chip.h')
0 files changed, 0 insertions, 0 deletions