diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-04-29 10:42:34 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-01 16:35:06 +0000 |
| commit | b887adf7a56f2877c41e808002f30841a6679eb6 (patch) | |
| tree | 21610d86c82b79f9c72e89b4be09fac4035d2505 /src/soc/intel/broadwell/adsp.c | |
| parent | 3e42ee05d86c1de3ed23dddf08fd8e6451bdea92 (diff) | |
soc/intel/broadwell: Fix 16-bit read/write PCI_COMMAND register
Change-Id: I0fd1a758d8838b3eea5640b41eee6a6893360aa3
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40850
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/broadwell/adsp.c')
| -rw-r--r-- | src/soc/intel/broadwell/adsp.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/soc/intel/broadwell/adsp.c b/src/soc/intel/broadwell/adsp.c index 82904de39b..64b7d5e639 100644 --- a/src/soc/intel/broadwell/adsp.c +++ b/src/soc/intel/broadwell/adsp.c @@ -24,9 +24,7 @@ static void adsp_init(struct device *dev) u32 tmp32; /* Ensure memory and bus master are enabled */ - tmp32 = pci_read_config32(dev, PCI_COMMAND); - tmp32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; - pci_write_config32(dev, PCI_COMMAND, tmp32); + pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); /* Find BAR0 and BAR1 */ bar0 = find_resource(dev, PCI_BASE_ADDRESS_0); |