diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-01-12 17:46:30 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-27 10:25:03 +0000 |
commit | 4abc73183134def757c553aa4eb195fffa824100 (patch) | |
tree | e6fa253f8e7dc46e80a0a33ea903b4fe0be83419 /src/soc/intel/broadwell/acpi | |
parent | aeffa86cc551110b62074fa6302f4960d87a9a8c (diff) |
ACPI: Separate device_nvs_t
Remove typedef device_nvs_t and move struct device_nvs
outside of global_nvs. Also remove padding and the reserve
for chromeos_acpi_t.
Change-Id: I878746b1f0f9152a27dc58e373d58115e2dff22c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49476
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/broadwell/acpi')
-rw-r--r-- | src/soc/intel/broadwell/acpi/device_nvs.asl | 43 | ||||
-rw-r--r-- | src/soc/intel/broadwell/acpi/platform.asl | 1 |
2 files changed, 44 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/acpi/device_nvs.asl b/src/soc/intel/broadwell/acpi/device_nvs.asl new file mode 100644 index 0000000000..30bb5b5cd0 --- /dev/null +++ b/src/soc/intel/broadwell/acpi/device_nvs.asl @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +External (NVSD) + +OperationRegion (DNVS, SystemMemory, NVSD, 0x1000) +Field (DNVS, ByteAcc, NoLock, Preserve) +{ + /* Device enables in ACPI mode */ + + S0EN, 8, // DMA Enable + S1EN, 8, // I2C0 Enable + S2EN, 8, // I2C1 Enable + S3EN, 8, // SPI0 Enable + S4EN, 8, // SPI1 Enable + S5EN, 8, // UART0 Enable + S6EN, 8, // UART1 Enable + S7EN, 8, // SDIO Enable + S8EN, 8, // ADSP Enable + + /* BAR 0 */ + + S0B0, 32, // DMA BAR0 + S1B0, 32, // I2C0 BAR0 + S2B0, 32, // I2C1 BAR0 + S3B0, 32, // SPI0 BAR0 + S4B0, 32, // SPI1 BAR0 + S5B0, 32, // UART0 BAR0 + S6B0, 32, // UART1 BAR0 + S7B0, 32, // SDIO BAR0 + S8B0, 32, // ADSP BAR0 + + /* BAR 1 */ + + S0B1, 32, // DMA BAR1 + S1B1, 32, // I2C0 BAR1 + S2B1, 32, // I2C1 BAR1 + S3B1, 32, // SPI0 BAR1 + S4B1, 32, // SPI1 BAR1 + S5B1, 32, // UART0 BAR1 + S6B1, 32, // UART1 BAR1 + S7B1, 32, // SDIO BAR1 + S8B1, 32, // ADSP BAR1 +} diff --git a/src/soc/intel/broadwell/acpi/platform.asl b/src/soc/intel/broadwell/acpi/platform.asl index 880b2061ec..fe254ff6f0 100644 --- a/src/soc/intel/broadwell/acpi/platform.asl +++ b/src/soc/intel/broadwell/acpi/platform.asl @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <soc/intel/broadwell/acpi/device_nvs.asl> #include <southbridge/intel/common/acpi/platform.asl> /* |