diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-09-24 16:50:05 +0200 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2020-10-14 08:36:43 +0000 |
commit | 2ead36334050ac692e64adc59a97320d8792adcc (patch) | |
tree | ca32a3b422b2be28268a390f65fe00bdc575914e /src/soc/intel/broadwell/acpi | |
parent | 9bf45b43ee81ceed6c6545c6ccfb791cc28c8993 (diff) |
soc/intel/broadwell: Align cosmetics with Haswell/Lynx Point
Tested with BUILD_TIMELESS=1, Purism Librem 13v1 does not change.
Change-Id: Icf41d9db20e492ec77a83f8413ac99a654d6c8ed
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45697
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell/acpi')
-rw-r--r-- | src/soc/intel/broadwell/acpi/lpc.asl | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/src/soc/intel/broadwell/acpi/lpc.asl b/src/soc/intel/broadwell/acpi/lpc.asl index 33c8dc92a0..5bdfea24ce 100644 --- a/src/soc/intel/broadwell/acpi/lpc.asl +++ b/src/soc/intel/broadwell/acpi/lpc.asl @@ -81,9 +81,7 @@ Device (LPCB) Method (_CRS, 0, Serialized) // Current resources { If (HPTE) { - CreateDWordField (BUF0, - \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0) - + CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0) If (Lequal(HPAS, 1)) { Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0) } @@ -153,8 +151,7 @@ Device (LPCB) IO (Decode16, 0x80, 0x80, 0x1, 0x01) // Port 80 Post IO (Decode16, 0x92, 0x92, 0x1, 0x01) // CPU Reserved IO (Decode16, 0xb2, 0xb2, 0x1, 0x02) // SWSMI - IO (Decode16, ACPI_BASE_ADDRESS, ACPI_BASE_ADDRESS, - 0x1, 0xff) + IO (Decode16, ACPI_BASE_ADDRESS, ACPI_BASE_ADDRESS, 0x1, 0xff) }) Method (_CRS, 0, NotSerialized) @@ -169,7 +166,6 @@ Device (LPCB) Name (_CRS, ResourceTemplate() { IO (Decode16, 0x70, 0x70, 1, 8) - //IRQNoFlags() { 8 } }) } |