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authorArthur Heymans <arthur@aheymans.xyz>2019-06-04 14:13:50 +0200
committerNico Huber <nico.h@gmx.de>2019-11-10 22:41:19 +0000
commit95755dd65d18955e375345f06da7966f137e7d62 (patch)
tree4b26c92e911d09bd4b8443345b385ddca54b5f05 /src/soc/intel/broadwell/Makefile.inc
parent2abbe467658a8e4479c381330e85e126c8f42a90 (diff)
soc/intel/broadwell: Use common INTEL_SB SPI code
Change-Id: Id906733ac3719c8d6835aad52ca87beb81b5771d Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33203 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/broadwell/Makefile.inc')
-rw-r--r--src/soc/intel/broadwell/Makefile.inc5
1 files changed, 0 insertions, 5 deletions
diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc
index 055a0049af..8f690cc4f6 100644
--- a/src/soc/intel/broadwell/Makefile.inc
+++ b/src/soc/intel/broadwell/Makefile.inc
@@ -58,11 +58,6 @@ romstage-y += smbus_common.c
ramstage-y += smi.c
smm-y += smihandler.c
ramstage-y += smmrelocate.c
-bootblock-y += spi.c
-romstage-y += spi.c
-postcar-y += spi.c
-ramstage-y += spi.c
-smm-$(CONFIG_SPI_FLASH_SMM) += spi.c
ramstage-y += systemagent.c
bootblock-y += tsc_freq.c
ramstage-y += tsc_freq.c