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| author | Duncan Laurie <dlaurie@chromium.org> | 2014-08-25 10:14:08 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2015-03-27 06:20:36 +0100 |
| commit | 55228ba4b41e820efea71a75c649a6dd29cc76d5 (patch) | |
| tree | b6d10b622a67278ceeaafd042db7c4057f84a72b /src/soc/intel/broadwell/Makefile.inc | |
| parent | be19c54585e4515811068370fa17ce8f4ea2a2bb (diff) | |
broadwell: Changes from 2.2.0 ref code
- The SATA CAP register setup was moved outside the refcode blob we run
so it needs to be set up by coreboot again...
- Slight tweak to fast ramp voltage for broadwell CPU
BUG=chrome-os-partner:25491
BRANCH=None
TEST=Build and boot on samus
Original-Change-Id: I7bdc0811ad8f28ab0912972036dca59d229b0173
Original-CSigned-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-CReviewed-on: https://chromium-review.googlesource.com/214024
Original-CReviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 5d166a0c4d206eaa885ecebaa0c3cefefdc59280)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: Id58d3bee5e713139edf6e8fda8cdf4c48ba95bd1
Reviewed-on: http://review.coreboot.org/8964
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/soc/intel/broadwell/Makefile.inc')
0 files changed, 0 insertions, 0 deletions