diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-06-23 15:16:15 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2022-08-14 10:53:47 +0000 |
| commit | 2a90e396fc1b0d008024cff1a1b02ee8f1cd0036 (patch) | |
| tree | deb8b3b86ab6acd104a28ee9d1e08eccfa8e04ef /src/soc/intel/broadwell/Makefile.inc | |
| parent | 333751b22e046793d84d72d1053b9c6aa2854d77 (diff) | |
mb/google/auron: Move SPD file handling to chipset
The SPD file handling code is generic and can be used on any other
mainboard. Move it to chipset scope to enable code reuse.
Change-Id: I85b1460ccb82f0c1bf409db4a6b4c9355c25e76d
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55808
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/soc/intel/broadwell/Makefile.inc')
| -rw-r--r-- | src/soc/intel/broadwell/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc index 55eddf18fd..db590e7fae 100644 --- a/src/soc/intel/broadwell/Makefile.inc +++ b/src/soc/intel/broadwell/Makefile.inc @@ -8,6 +8,7 @@ romstage-y += early_init.c romstage-y += raminit.c romstage-y += report_platform.c romstage-y += romstage.c +romstage-$(CONFIG_HAVE_SPD_IN_CBFS) += spd.c ramstage-y += acpi.c ramstage-y += finalize.c |