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author | Arthur Heymans <arthur@aheymans.xyz> | 2018-11-29 13:36:54 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-05 13:32:42 +0000 |
commit | 90cca5422d2d44ee96cbcd420a878b2fb1b3e111 (patch) | |
tree | 8d5f2e8c8b54ae2a0c69a8eb2e673d4feb03efe9 /src/soc/intel/broadwell/Kconfig | |
parent | 9fca297ca44eb388229523f820f57f795b49af15 (diff) |
soc/intel/broadwell: Implement postcar stage
This does the following:
- Reuse the cpu/intel/car/non-evict CAR setup and exit.
- Use postcar_frame functions to set up the postcar frame
Change-Id: I428832a2d7e46ce61a7f9bd498b609feb4518eb0
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/29927
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/broadwell/Kconfig')
-rw-r--r-- | src/soc/intel/broadwell/Kconfig | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 18ec51f68e..e6cbd9518f 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -40,6 +40,8 @@ config CPU_SPECIFIC_OPTIONS select HAVE_SPI_CONSOLE_SUPPORT select CPU_INTEL_COMMON select INTEL_GMA_ACPI + select POSTCAR_STAGE + select POSTCAR_CONSOLE config PCIEXP_ASPM bool |