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authorLijian Zhao <lijian.zhao@intel.com>2017-10-04 13:43:47 -0700
committerAaron Durbin <adurbin@chromium.org>2017-10-18 19:46:10 +0000
commit580bc412c7449a3592e80ac737c3492af6594dfa (patch)
tree99907980f2b3c3ccd064a1894da90b81857ff97b /src/soc/intel/broadwell/Kconfig
parent6cf501c3ae0278092cb76ccab015ad891af1fd48 (diff)
soc/intel/cannonlake: Update PCIE CLKREQ programing
UPD of PCI express clock request was updated in FSP 7.0.14.11, change that in coreboot accordingly. TEST=NONE Change-Id: I2261deccfb489c0de577d580997744a484f07a04 Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/21878 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell/Kconfig')
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