diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-10-13 20:49:23 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-10-23 18:08:51 +0000 |
| commit | dd558fd0cf81886fdc1b6f2bb5045031a69f55cd (patch) | |
| tree | d3930a6e2ea25a1fd036b57f171e51e0ede6544a /src/soc/intel/broadwell/Kconfig | |
| parent | f2e2b9688e48bef26dcb6a178a01b92073333e4e (diff) | |
soc/intel/broadwell: Use common early SMBus code
Disabling interrupts and clearing errors was being done twice, once in
the `smbus_enable_iobar` reg-script, and another in `enable_smbus`.
Change-Id: I58558996bd693b302764965a5bed8b96db363833
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46355
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/broadwell/Kconfig')
| -rw-r--r-- | src/soc/intel/broadwell/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 0ea5dbd065..35129af8b7 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -17,6 +17,7 @@ config CPU_SPECIFIC_OPTIONS select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER + select SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS select SOUTHBRIDGE_INTEL_COMMON_RESET select SOUTHBRIDGE_INTEL_COMMON_RTC select SOUTHBRIDGE_INTEL_COMMON_SMBUS |