diff options
author | Felix Singer <felixsinger@posteo.net> | 2022-12-12 00:59:28 +0100 |
---|---|---|
committer | Felix Singer <felixsinger@posteo.net> | 2022-12-12 22:13:00 +0000 |
commit | fe33b4cb7ce0bab9269819b4e0d040cd9554411a (patch) | |
tree | d6347924e5be9a5cc2d25ee139a00c3a6c3bb398 /src/soc/intel/braswell | |
parent | e4c30044f2773094f77106dc85940c7ba23ac0af (diff) |
soc/intel/acpi: Replace Add(a,b) with ASL 2.0 syntax
Replace `Add (a, b)` with `a + b`.
Change-Id: I0b7f22acf153fe02b471c196f8161fc0fa5a1450
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70624
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Diffstat (limited to 'src/soc/intel/braswell')
-rw-r--r-- | src/soc/intel/braswell/acpi/southcluster.asl | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/braswell/acpi/southcluster.asl b/src/soc/intel/braswell/acpi/southcluster.asl index 3b33a795a9..0a4dbd1e80 100644 --- a/src/soc/intel/braswell/acpi/southcluster.asl +++ b/src/soc/intel/braswell/acpi/southcluster.asl @@ -157,7 +157,7 @@ Method (_CRS, 0, Serialized) If (LAnd (LPFW != Zero, LPEN == One)) { Store (LPFW, LMIN) - Store (Add (LMIN, 0x001FFFFF), LMAX) + Store (LMIN + 0x001FFFFF, LMAX) Store (0x00200000, LLEN) } Else @@ -237,7 +237,7 @@ Device (IOSF) Method (_CRS) { CreateDwordField (^RBUF, ^RBAR._BAS, RBAS) - Store (Add (CONFIG_ECAM_MMCONF_BASE_ADDRESS, 0xD0), RBAS) + Store (CONFIG_ECAM_MMCONF_BASE_ADDRESS + 0xD0, RBAS) Return (^RBUF) } } |