summaryrefslogtreecommitdiff
path: root/src/soc/intel/braswell
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2019-01-25 20:05:38 +0100
committerSubrata Banik <subrata.banik@intel.com>2019-01-28 06:36:14 +0000
commitacb6e138b2e94b0e66e9930fc31751a3b48eee98 (patch)
tree0314226552db06ef3bc470d9e091ae037940b8f7 /src/soc/intel/braswell
parentd731a24ff1b9f148609fa5052449caaab129e260 (diff)
src/soc/intel/cnl/chip.h: Fix preprocessor condition
Commit dc666f5 (soc/intel/cannonlake: Change in SaGv options) added a conditional preprocessor directive, but its condition was incorrect because SOC_INTEL_CANNONLAKE is selected for CNL, CFL and WHL. Thus, an explicit check for !SOC_INTEL_COFFEELAKE is required. While we are at it, clean up the comment above a bit. BUG=b:123184474 Change-Id: I8a6959bb615fb5668cbfe54339747d135bd5a005 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/31095 Reviewed-by: Shelley Chen <shchen@google.com> Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell')
0 files changed, 0 insertions, 0 deletions