summaryrefslogtreecommitdiff
path: root/src/soc/intel/braswell
diff options
context:
space:
mode:
authorFelix Singer <felixsinger@posteo.net>2022-12-26 09:43:07 +0100
committerFelix Singer <felixsinger@posteo.net>2022-12-27 09:06:47 +0000
commit9df60d36b2637c500030e7c9cef620002f7f47bf (patch)
treeee8b6e961747141ca37db831680fb3f371e4782a /src/soc/intel/braswell
parent42efd7f593c9d270ff330d1282d9c569d1ec709a (diff)
tree/acpi: Replace constant "Zero" with actual number
Change-Id: I5a3e3506415f424bf0fdd48fc449520a76622af5 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71525 Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell')
-rw-r--r--src/soc/intel/braswell/acpi/dptf/charger.asl2
-rw-r--r--src/soc/intel/braswell/acpi/irqlinks.asl16
-rw-r--r--src/soc/intel/braswell/acpi/scc.asl2
-rw-r--r--src/soc/intel/braswell/acpi/southcluster.asl8
4 files changed, 14 insertions, 14 deletions
diff --git a/src/soc/intel/braswell/acpi/dptf/charger.asl b/src/soc/intel/braswell/acpi/dptf/charger.asl
index 76209c9a46..0c9b3f51d2 100644
--- a/src/soc/intel/braswell/acpi/dptf/charger.asl
+++ b/src/soc/intel/braswell/acpi/dptf/charger.asl
@@ -30,7 +30,7 @@ Device (TCHG)
Local0--
/* Check if charging is disabled (AC removed) */
- If (\_SB.PCI0.LPCB.EC0.ACEX == Zero) {
+ If (\_SB.PCI0.LPCB.EC0.ACEX == 0) {
/* Return last power state */
Return (Local0)
} Else {
diff --git a/src/soc/intel/braswell/acpi/irqlinks.asl b/src/soc/intel/braswell/acpi/irqlinks.asl
index e3df22de7b..b1d9d6acb5 100644
--- a/src/soc/intel/braswell/acpi/irqlinks.asl
+++ b/src/soc/intel/braswell/acpi/irqlinks.asl
@@ -28,7 +28,7 @@ Device (LNKA)
CreateWordField(RTLA, 1, IRQ0)
/* Clear the WordField */
- IRQ0 = Zero
+ IRQ0 = 0
/* Set the bit from PRTA */
IRQ0 = 1 << (PRTA & 0x0f)
@@ -87,7 +87,7 @@ Device (LNKB)
CreateWordField(RTLB, 1, IRQ0)
/* Clear the WordField */
- IRQ0 = Zero
+ IRQ0 = 0
/* Set the bit from PRTB */
IRQ0 = 1 << (PRTB & 0x0f)
@@ -146,7 +146,7 @@ Device (LNKC)
CreateWordField(RTLC, 1, IRQ0)
/* Clear the WordField */
- IRQ0 = Zero
+ IRQ0 = 0
/* Set the bit from PRTC */
IRQ0 = 1 << (PRTC & 0x0f)
@@ -205,7 +205,7 @@ Device (LNKD)
CreateWordField(RTLD, 1, IRQ0)
/* Clear the WordField */
- IRQ0 = Zero
+ IRQ0 = 0
/* Set the bit from PRTD */
IRQ0 = 1 << (PRTD & 0x0f)
@@ -264,7 +264,7 @@ Device (LNKE)
CreateWordField(RTLE, 1, IRQ0)
/* Clear the WordField */
- IRQ0 = Zero
+ IRQ0 = 0
/* Set the bit from PRTE */
IRQ0 = 1 << (PRTE & 0x0f)
@@ -323,7 +323,7 @@ Device (LNKF)
CreateWordField(RTLF, 1, IRQ0)
/* Clear the WordField */
- IRQ0 = Zero
+ IRQ0 = 0
/* Set the bit from PRTF */
IRQ0 = 1 << (PRTF & 0x0f)
@@ -382,7 +382,7 @@ Device (LNKG)
CreateWordField(RTLG, 1, IRQ0)
/* Clear the WordField */
- IRQ0 = Zero
+ IRQ0 = 0
/* Set the bit from PRTG */
IRQ0 = 1 << (PRTG & 0x0f)
@@ -441,7 +441,7 @@ Device (LNKH)
CreateWordField(RTLH, 1, IRQ0)
/* Clear the WordField */
- IRQ0 = Zero
+ IRQ0 = 0
/* Set the bit from PRTH */
IRQ0 = 1 << (PRTH & 0x0f)
diff --git a/src/soc/intel/braswell/acpi/scc.asl b/src/soc/intel/braswell/acpi/scc.asl
index 91c5d278f1..a071e0861d 100644
--- a/src/soc/intel/braswell/acpi/scc.asl
+++ b/src/soc/intel/braswell/acpi/scc.asl
@@ -96,7 +96,7 @@ Device (PEMC)
Name (_ADR, 0x08)
Method (_RMV, 0, NotSerialized)
{
- Return (Zero)
+ Return (0)
}
}
}
diff --git a/src/soc/intel/braswell/acpi/southcluster.asl b/src/soc/intel/braswell/acpi/southcluster.asl
index 39aa076caf..3dcc6c1951 100644
--- a/src/soc/intel/braswell/acpi/southcluster.asl
+++ b/src/soc/intel/braswell/acpi/southcluster.asl
@@ -154,7 +154,7 @@ Method (_CRS, 0, Serialized)
CreateDWordField (MCRS, LMEM._MIN, LMIN)
CreateDWordField (MCRS, LMEM._MAX, LMAX)
CreateDWordField (MCRS, LMEM._LEN, LLEN)
- If (LPFW != Zero && LPEN == 1)
+ If (LPFW != 0 && LPEN == 1)
{
LMIN = LPFW
LMAX = LMIN + 0x001FFFFF
@@ -162,9 +162,9 @@ Method (_CRS, 0, Serialized)
}
Else
{
- LMIN = Zero
- LMAX = Zero
- LLEN = Zero
+ LMIN = 0
+ LMAX = 0
+ LLEN = 0
}
/* Update PCI resource area */