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| author | Matt DeVillier <matt.devillier@gmail.com> | 2019-05-18 15:51:39 -0500 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-05-22 10:06:50 +0000 |
| commit | 8ef2a45bb9139a160d2562938680a73edb10e8ae (patch) | |
| tree | 85d4d060bbf528854048beac7f73e9859f537b75 /src/soc/intel/braswell | |
| parent | 9b0d8e7a1fd18a53579d0332204d2be57ec0474b (diff) | |
soc/{baytrail/braswell/broadwell}: fix flashconsole on platform
Enabling flashconsole on these platforms fails to build due to
spi.c not being compiled in prior to ramstage. Include in early stages
(bootblock/romstage/postcar) as needed to enable flashconsole support.
Early inclusion of monotonic_timer.c is needed for Broadwell as well.
Change-Id: Idae0578ca92939246021bb85e34b0dcbd41df3b5
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32878
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/soc/intel/braswell')
| -rw-r--r-- | src/soc/intel/braswell/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc index 6b466c66f8..e479a3c5e5 100644 --- a/src/soc/intel/braswell/Makefile.inc +++ b/src/soc/intel/braswell/Makefile.inc @@ -15,10 +15,12 @@ romstage-y += lpc_init.c romstage-y += memmap.c romstage-y += pmutil.c romstage-y += smbus.c +romstage-y += spi.c romstage-y += tsc_freq.c postcar-y += memmap.c postcar-y += iosf.c +postcar-y += spi.c postcar-y += tsc_freq.c ramstage-y += acpi.c |