diff options
| author | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2018-11-08 10:59:40 +0100 |
|---|---|---|
| committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2019-02-25 22:29:16 +0000 |
| commit | 66f9a09916368bfab09da42ef0beed84a4bb7206 (patch) | |
| tree | 57ab1cd5851055c117db7fee991d03207b28c69d /src/soc/intel/braswell | |
| parent | bacd57dfaf7b4c5d3bc5400dbd82b896d0ed23cc (diff) | |
security/vboot: Add measured boot mode
* Introduce a measured boot mode into vboot.
* Add hook for stage measurements in prog_loader and cbfs.
* Implement and hook-up CRTM in vboot and check for suspend.
Change-Id: I339a2f1051e44f36aba9f99828f130592a09355e
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/29547
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell')
| -rw-r--r-- | src/soc/intel/braswell/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc index fabbc2bc61..d5fe1abb66 100644 --- a/src/soc/intel/braswell/Makefile.inc +++ b/src/soc/intel/braswell/Makefile.inc @@ -16,6 +16,8 @@ romstage-y += memmap.c romstage-y += pmutil.c romstage-y += tsc_freq.c +postcar-y += tsc_freq.c + ramstage-y += acpi.c ramstage-y += chip.c ramstage-y += cpu.c |