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authorTim Wawrzynczak <twawrzynczak@chromium.org>2021-03-01 08:24:52 -0700
committerTim Wawrzynczak <twawrzynczak@chromium.org>2021-03-02 16:59:44 +0000
commit37c332782a90c2a3f1543ece585ac305d6c610de (patch)
tree52ad2233e35c69fe9f249dd10c2b295934440b62 /src/soc/intel/braswell
parenta91eb90d44bccd0a785b4659ebbeae5da08eea83 (diff)
mb/google/brya: Fix a few mistakes in brya0 overridetree
1) Both SAR sensors had a UID of `2`, making them indistinguishable 2) No `device` underneath max98357a `chip` Change-Id: Icf586229532819a7779652cbee73755b036dfbdc Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51145 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell')
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