diff options
author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2019-03-27 10:39:55 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-05-10 15:13:07 +0000 |
commit | 1119428693e9a8b071115187e601f94d1d706c23 (patch) | |
tree | 0340ea7848ef73188ca92372ae56d38c1bdcb9c7 /src/soc/intel/braswell | |
parent | 4feaf6b7b8745ba5a98b9b9372bb0a53b36b38e8 (diff) |
soc/intel/braswell/smbus: Enable early SMBus in romstage
Enable early SMBus support compatible with SPD library using Intel SB
common SMBus API.
TEST=boot Protectli FW2B with new FSP, MemoryInit should pass without
errors
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I92a2c5a6d0b38e5658cfdc017041f12717dabdd5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32062
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/braswell')
-rw-r--r-- | src/soc/intel/braswell/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/braswell/smbus.c | 29 |
2 files changed, 30 insertions, 0 deletions
diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc index a2b7ee5e67..4e90edf15c 100644 --- a/src/soc/intel/braswell/Makefile.inc +++ b/src/soc/intel/braswell/Makefile.inc @@ -14,6 +14,7 @@ romstage-y += iosf.c romstage-y += lpc_init.c romstage-y += memmap.c romstage-y += pmutil.c +romstage-y += smbus.c romstage-y += tsc_freq.c postcar-y += tsc_freq.c diff --git a/src/soc/intel/braswell/smbus.c b/src/soc/intel/braswell/smbus.c new file mode 100644 index 0000000000..7e1b0dfbb0 --- /dev/null +++ b/src/soc/intel/braswell/smbus.c @@ -0,0 +1,29 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Intel Corporation. + * Copyright (C) 2019 3mdeb + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <device/early_smbus.h> +#include <soc/iomap.h> +#include <southbridge/intel/common/smbus.h> + +u8 smbus_read_byte(u32 smbus_dev, u8 addr, u8 offset) +{ + return do_smbus_read_byte(SMBUS_BASE_ADDRESS, addr, offset); +} + +u8 smbus_write_byte(u32 smbus_dev, u8 addr, u8 offset, u8 value) +{ + return do_smbus_write_byte(SMBUS_BASE_ADDRESS, addr, offset, value); +} |