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author | Matt DeVillier <matt.devillier@gmail.com> | 2023-10-21 20:44:58 -0500 |
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committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2023-10-31 15:06:27 +0000 |
commit | b065e811bd18d3d2d256f3ff3e4deda7eb0b0609 (patch) | |
tree | 7e8d0e9f79bbe296d417384ae2a8fe35f1196553 /src/soc/intel/braswell | |
parent | 1cbdb205d94a024570895d31c413609544f62a54 (diff) |
soc/intel/cannonlake: Implement SoC sleep state array
Adapted from Alderlake implementation, modified as needed.
Device names missing from soc_acpi_name() were added as well.
TEST=build/boot Win11, Linux on google/hatch (akemi).
Change-Id: Ib2c733c04e29f0f9e7e2e6dbf36c2a7618fdc23f
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78522
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Diffstat (limited to 'src/soc/intel/braswell')
0 files changed, 0 insertions, 0 deletions