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| author | Angel Pons <th3fanbus@gmail.com> | 2021-06-22 15:18:07 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2021-07-02 08:19:10 +0000 |
| commit | 6f5a6581a61706b0b271ff16845fd0cefe46928b (patch) | |
| tree | 53d856256dd67a3675f4f445245d4b0fe8f0672e /src/soc/intel/braswell | |
| parent | de62f55507b6ca4f98df3edd75b57e73814c1f2d (diff) | |
src: Introduce `ARCH_ALL_STAGES_X86`
Introduce the `ARCH_ALL_STAGES_X86` Kconfig symbol to automatically
select the per-stage arch options. Subsequent commits will leverage
this to allow choosing between 32-bit and 64-bit coreboot where all
stages are x86. AMD Picasso and AMD Cezanne are the only exceptions
to this rule: they disable `ARCH_ALL_STAGES_X86` and explicitly set
the per-stage arch options accordingly.
Change-Id: Ia2ddbae8c0dfb5301352d725032f6ebd370428c9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55759
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/soc/intel/braswell')
| -rw-r--r-- | src/soc/intel/braswell/Kconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index 7301d6327c..8ccf0432bc 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -8,7 +8,6 @@ if SOC_INTEL_BRASWELL config CPU_SPECIFIC_OPTIONS def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES select BOOT_DEVICE_SUPPORTS_WRITES |