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authorMatt DeVillier <matt.devillier@gmail.com>2017-04-22 16:36:10 -0500
committerMartin Roth <martinroth@google.com>2017-06-09 16:27:57 +0200
commitdc1b78130a4d656d5443ff5db393ebeaed1e8207 (patch)
tree0587ed2ad630a8d90be851690a274df823fe39ca /src/soc/intel/braswell
parentb9959e279c40b6db50efa61d20838757080fa4dd (diff)
soc/skylake: add ACPI method to generate USB port info
Add ACPI method GPLD to generate port location data when passed visiblity info. Will be used by _PLD method in board-specific USB .asl files. Change-Id: I14ba3cea821e103208426e9fcaa0833d84157ff8 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/19975 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell')
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