diff options
| author | John Zhao <john.zhao@intel.com> | 2020-03-13 15:20:18 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-17 08:24:29 +0000 |
| commit | bc25a361dc7096b51f56640273269e4867eb0881 (patch) | |
| tree | 3974f6fefdddf68c2c5ddc9de3a98451b01c61b5 /src/soc/intel/braswell | |
| parent | 1af482c9c9679cb7a6b54dfd74c88eb4c9ee8de5 (diff) | |
src/include/device: Add Intel Tiger Lake Thunderbolt device Id
Tiger Lake Thunderbolt(TBT) has 4 PCIe root ports. Add those TBT
root port devices Id from EDS #575683.
BUG=None
TEST=built image and booted to kernel successfully.
Change-Id: Ia117d63daa15dfb21db28fd76723e97ab030da92
Signed-off-by: John Zhao <john.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39526
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Reviewed-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell')
0 files changed, 0 insertions, 0 deletions