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authorMark Hsieh <mark_hsieh@wistron.corp-partner.google.com>2020-09-02 13:53:43 +0800
committerPatrick Georgi <pgeorgi@google.com>2020-09-08 05:26:02 +0000
commit657edbeea4e754114bf1181f60731020c143ac76 (patch)
tree3d45f8d968cc1d78326a351977a9f5b89375a650 /src/soc/intel/braswell
parent0cded1f116ed669b6b2b0c8703863691f9957c65 (diff)
mb/google/volteer: config QS silicon devices for CSE LITE
Configure eldrid to use CSE Lite. BUG=b:158140797 TEST=cd to volteer's asset_generation folder, execute "./gen_all_variant_images.sh" and verify that all variant images are produced. Signed-off-by: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com> Change-Id: I357abdac4102f358d3aa1cb50f600312039ef140 Reviewed-on: https://review.coreboot.org/c/coreboot/+/45018 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Caveh Jalali <caveh@chromium.org>
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