diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2017-09-15 14:32:13 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-09-20 23:54:14 +0000 |
| commit | b19e33f05ca43a40babe4f081bf6fb0ff53f5d4f (patch) | |
| tree | df02f5666ffdb0da6951d8b5496d0e95813c939f /src/soc/intel/braswell/southcluster.c | |
| parent | 64b4bddcbc2156e9a410f07e14e58cf01d579fdb (diff) | |
soc/intel/braswell: refactor rtc failure checking
In order to prepare for checking RTC failure in the early boot
paths move the rtc failure calculation to pmutil.c and add a helper
function to determine if failure occurred.
BUG=b:63054105
Change-Id: Ic4bf99dc3a26fbc3bd508e484963b9298ef1b24b
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/21556
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/braswell/southcluster.c')
| -rw-r--r-- | src/soc/intel/braswell/southcluster.c | 19 |
1 files changed, 2 insertions, 17 deletions
diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c index e03312386a..6eb61c72af 100644 --- a/src/soc/intel/braswell/southcluster.c +++ b/src/soc/intel/braswell/southcluster.c @@ -149,23 +149,8 @@ static void sc_read_resources(device_t dev) static void sc_rtc_init(void) { - uint32_t gen_pmcon1; - int rtc_fail; - struct chipset_power_state *ps = cbmem_find(CBMEM_ID_POWER_STATE); - - printk(BIOS_SPEW, "%s/%s\n", - __FILE__, __func__); - if (ps != NULL) - gen_pmcon1 = ps->gen_pmcon1; - else - gen_pmcon1 = read32((void *)(PMC_BASE_ADDRESS + GEN_PMCON1)); - - rtc_fail = !!(gen_pmcon1 & RPS); - - if (rtc_fail) - printk(BIOS_DEBUG, "RTC failure.\n"); - - cmos_init(rtc_fail); + printk(BIOS_SPEW, "%s/%s\n", __FILE__, __func__); + cmos_init(rtc_failure()); } static void sc_init(device_t dev) |