diff options
| author | Tyler Wang <tyler.wang@quanta.corp-partner.google.com> | 2022-05-16 15:31:31 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-05-21 16:29:00 +0000 |
| commit | 59f3eb9a0704437412a4700dd75ca0b27723d187 (patch) | |
| tree | 92ded6edaf7c35ebf3d1e859ce1eda3352b3d219 /src/soc/intel/braswell/southcluster.c | |
| parent | f304d5ff8ca22409216d919d379385eb7ba4bb3e (diff) | |
mb/google/brya/var/craask: Generate SPD ID for supported memory part
Add supported memory parts in mem_parts_used.txt, and generate SPD id
for this part.
H9JCNNNBK3MLYR-N6E
BUG=b:229938024
TEST=emerge-nissa coreboot
Signed-off-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com>
Change-Id: Ibb111cddc00a0d066ef9792d974a6e4ad263cc99
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64383
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/soc/intel/braswell/southcluster.c')
0 files changed, 0 insertions, 0 deletions