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authorFrans Hendriks <fhendriks@eltan.com>2018-12-10 12:38:16 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-02-28 17:03:49 +0000
commit9348413c61b22300ce23baf4503825219249a5ad (patch)
tree997a58bff4aafd692188b27842024bd92d233eea /src/soc/intel/braswell/smm.c
parent3e8504a325007cfbc6fdaa5e034ddea0657ee737 (diff)
soc/intel/braswell: Correct configuration of interrupts
The level/edge mode of PIRQ is not configured and i8259 PIC not initialized. Add calls to: - i8259_configure_irq_trigger() - setup_i8259() - write_pci_config_irqs() to correct the configuration of interrupts. BUG=N/A TEST=Intel CherryHill CRB Change-Id: I128cb35dd0e348a9cd9fb162651e0aa2b7e4a3ef Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/29419 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Diffstat (limited to 'src/soc/intel/braswell/smm.c')
0 files changed, 0 insertions, 0 deletions