diff options
| author | Elyes Haouas <ehaouas@noos.fr> | 2023-09-17 10:22:02 +0200 |
|---|---|---|
| committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2024-01-18 01:21:22 +0000 |
| commit | a506451d9fbf8ab520295934076a328f734bf401 (patch) | |
| tree | 28c697c3ab3f73c8f3e355678500107bb3af4749 /src/soc/intel/braswell/smihandler.c | |
| parent | 0c7e93f974d3205f90478793628789b7a9184d6c (diff) | |
soc/intel/braswell: Use {read,write}32p()
Change-Id: I00894565efc405a47348236ad7df50071a843487
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77972
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell/smihandler.c')
| -rw-r--r-- | src/soc/intel/braswell/smihandler.c | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/src/soc/intel/braswell/smihandler.c b/src/soc/intel/braswell/smihandler.c index f2151a9bb3..d2588cf766 100644 --- a/src/soc/intel/braswell/smihandler.c +++ b/src/soc/intel/braswell/smihandler.c @@ -60,24 +60,24 @@ static void busmaster_disable_on_bus(int bus) static void tristate_gpios(uint32_t val) { /* Tri-state eMMC */ - write32((void *)COMMUNITY_GPSOUTHEAST_BASE + SDMMC1_CMD_MMIO_OFFSET, val); - write32((void *)COMMUNITY_GPSOUTHEAST_BASE + SDMMC1_D0_MMIO_OFFSET, val); - write32((void *)COMMUNITY_GPSOUTHEAST_BASE + SDMMC1_D1_MMIO_OFFSET, val); - write32((void *)COMMUNITY_GPSOUTHEAST_BASE + SDMMC1_D2_MMIO_OFFSET, val); - write32((void *)COMMUNITY_GPSOUTHEAST_BASE + SDMMC1_D3_MMIO_OFFSET, val); - write32((void *)COMMUNITY_GPSOUTHEAST_BASE + MMC1_D4_SD_WE_MMIO_OFFSET, val); - write32((void *)COMMUNITY_GPSOUTHEAST_BASE + MMC1_D5_MMIO_OFFSET, val); - write32((void *)COMMUNITY_GPSOUTHEAST_BASE + MMC1_D6_MMIO_OFFSET, val); - write32((void *)COMMUNITY_GPSOUTHEAST_BASE + MMC1_D7_MMIO_OFFSET, val); - write32((void *)COMMUNITY_GPSOUTHEAST_BASE + MMC1_RCLK_OFFSET, val); + write32p(COMMUNITY_GPSOUTHEAST_BASE + SDMMC1_CMD_MMIO_OFFSET, val); + write32p(COMMUNITY_GPSOUTHEAST_BASE + SDMMC1_D0_MMIO_OFFSET, val); + write32p(COMMUNITY_GPSOUTHEAST_BASE + SDMMC1_D1_MMIO_OFFSET, val); + write32p(COMMUNITY_GPSOUTHEAST_BASE + SDMMC1_D2_MMIO_OFFSET, val); + write32p(COMMUNITY_GPSOUTHEAST_BASE + SDMMC1_D3_MMIO_OFFSET, val); + write32p(COMMUNITY_GPSOUTHEAST_BASE + MMC1_D4_SD_WE_MMIO_OFFSET, val); + write32p(COMMUNITY_GPSOUTHEAST_BASE + MMC1_D5_MMIO_OFFSET, val); + write32p(COMMUNITY_GPSOUTHEAST_BASE + MMC1_D6_MMIO_OFFSET, val); + write32p(COMMUNITY_GPSOUTHEAST_BASE + MMC1_D7_MMIO_OFFSET, val); + write32p(COMMUNITY_GPSOUTHEAST_BASE + MMC1_RCLK_OFFSET, val); /* Tri-state HDMI */ - write32((void *)COMMUNITY_GPNORTH_BASE + HV_DDI2_DDC_SDA_MMIO_OFFSET, val); - write32((void *)COMMUNITY_GPNORTH_BASE + HV_DDI2_DDC_SCL_MMIO_OFFSET, val); + write32p(COMMUNITY_GPNORTH_BASE + HV_DDI2_DDC_SDA_MMIO_OFFSET, val); + write32p(COMMUNITY_GPNORTH_BASE + HV_DDI2_DDC_SCL_MMIO_OFFSET, val); /* Tri-state CFIO 139 and 140 */ - write32((void *)COMMUNITY_GPSOUTHWEST_BASE + CFIO_139_MMIO_OFFSET, val); - write32((void *)COMMUNITY_GPSOUTHWEST_BASE + CFIO_140_MMIO_OFFSET, val); + write32p(COMMUNITY_GPSOUTHWEST_BASE + CFIO_139_MMIO_OFFSET, val); + write32p(COMMUNITY_GPSOUTHWEST_BASE + CFIO_140_MMIO_OFFSET, val); } static void southbridge_smi_sleep(void) @@ -136,7 +136,7 @@ static void southbridge_smi_sleep(void) } /* Clear pending wake status bit to avoid immediate wake */ - write32((void *)(0xfed88000 + 0x0200), read32((void *)(0xfed88000 + 0x0200))); + write32p(0xfed88000 + 0x0200, read32p(0xfed88000 + 0x0200)); /* Tri-state specific GPIOS to avoid leakage during S3/S5 */ if ((slp_typ == ACPI_S3) || (slp_typ == ACPI_S5)) |