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authorKyösti Mälkki <kyosti.malkki@gmail.com>2018-05-22 02:18:00 +0300
committerFelix Held <felix-coreboot@felixheld.de>2019-01-06 01:17:54 +0000
commitc70eed1e6202c928803f3e7f79161cd247a62b23 (patch)
treee46a6c87f6f13b7719fd40a9360d8d03359bfffb /src/soc/intel/braswell/romstage
parent54efaae701dacd58621e66a8cf56812eb5304946 (diff)
device: Use pcidev_on_root()
Change-Id: Icf34b39d80f6e46d32a39b68f38fb2752c0bcebc Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/26484 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Piotr Król <piotr.krol@3mdeb.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/braswell/romstage')
-rw-r--r--src/soc/intel/braswell/romstage/romstage.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c
index 14eaa6b3a8..9b9a0eba5d 100644
--- a/src/soc/intel/braswell/romstage/romstage.c
+++ b/src/soc/intel/braswell/romstage/romstage.c
@@ -216,7 +216,7 @@ void soc_memory_init_params(struct romstage_params *params,
const struct soc_intel_braswell_config *config;
/* Set the parameters for MemoryInit */
- dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC));
+ dev = pcidev_on_root(LPC_DEV, LPC_FUNC);
if (!dev) {
printk(BIOS_ERR,