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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-07-13 22:16:25 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-07-18 15:25:35 +0000 |
| commit | 8950cfb66f8f1fd4b047fbef2347134be0aeacec (patch) | |
| tree | 57943bfb4f8d74c2d1a4bfbd2a9813ac27e510dd /src/soc/intel/braswell/romstage | |
| parent | 4af4e7f06eddad71f86eda3e401967e79d3a9ddb (diff) | |
soc/intel: Use config_of()
Change-Id: I0727a6b327410197cf32f598d1312737744386b3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34328
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: David Guckian
Diffstat (limited to 'src/soc/intel/braswell/romstage')
| -rw-r--r-- | src/soc/intel/braswell/romstage/romstage.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c index e0e22f220e..38a0c2e693 100644 --- a/src/soc/intel/braswell/romstage/romstage.c +++ b/src/soc/intel/braswell/romstage/romstage.c @@ -124,7 +124,7 @@ void soc_memory_init_params(struct romstage_params *params, return; } - config = dev->chip_info; + config = config_of(dev); printk(BIOS_DEBUG, "Updating UPD values for MemoryInit\n"); upd->PcdMrcInitTsegSize = CONFIG(HAVE_SMI_HANDLER) ? config->PcdMrcInitTsegSize : 0; |