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| author | Naresh G Solanki <naresh.solanki@intel.com> | 2017-07-11 17:01:28 +0530 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-08-08 15:25:27 +0000 |
| commit | 2991f3c48f99dc2849391725b16309eb96aa41a7 (patch) | |
| tree | ec3ebeaddcf2455b75eb228882539cbb566d82c8 /src/soc/intel/braswell/pcie.c | |
| parent | 85227a27fb448a46933974e9670149c6f89bffcf (diff) | |
soc/intel/skylake: Log wakes caused by PME on internal bus and PCIE RP
Internal PME is detected when bit PME_B0_STS is set. Following devices
causes internal PME.
- Integrated LAN
- HD Audio/Audio DSP
- SATA
- XHCI ('USB3')
- ME Maskable Host Wake
In SPT, PCIEXPWAK_STS bit isn't getting set due to known bug.
So scan all PCIe RP for PME status bit & update event log accordingly.
BUG=b:36992859
TEST=Build for Soraka, Verify resume due to PME on root port is logged
in elog.
Change-Id: I879a7c332e62ab598942b29d31bad84619b35ea7
Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Reviewed-on: https://review.coreboot.org/20532
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/braswell/pcie.c')
0 files changed, 0 insertions, 0 deletions